I'm Christophe Dubach, a Reader (Associate Professor) at the University of Edinburgh.

I'm part of the CArD group in the school of informatics. My research interests include data-prallel language design and implementation, high-level code generation and optimisation for parallel hardware (e.g. GPU, FPGAs), architecture design space exploration, and the use of machine-learning techniques applied to all these topics.


Research Team


Lu Li

PhD Students

Toomas Remmelg
Paul-Jules Micolet
Larisa Stoltzfus
Federico Pizzuti
Naums Mogers
Andrej Ivanis
Christophe Schlaak

Former Members

Michel Steuwer
(Postdoc 2015-2017)
Now Lecturer at Glasgow University
Thibaut Lutz
(Postdoc 2015)
Now at Nvidia
Juan Jose Fumero
(PhD student 2013-2017)
Now postdoc at Manchester University
Alberto Magni
(PhD student 2012-2015)
Now at MSR Cambridge
Erik Tomusk
(PhD student 2012-2015)
Now postdoc at University of Edinburgh

Research Highlights

High-Performance Code Generation for Parallel Processors using Functional Patterns

Project supported by Google.

---> www.lift-project.org <---

Computing systems have become increasingly complex with the emergence of heterogeneous hardware combining multicore CPUs and GPUs. These parallel systems exhibit tremendous computational power at the cost of increased programming effort. This results in a tension between performance and code portability. This project investigates a novel approach aiming to combine high-level programming, code portability, and high-performance. Starting from a high-level functional expression we apply a simple set of rewrite rules to transform it into a low-level functional representation close to the OpenCL programming model and from which OpenCL code is generated. Our rewrite rules define a space of possible implementations which we automatically explore to generate hardware-specific OpenCL implementations.

GPU-Acceleration for the Graal VM

Project supported by Oracle Labs.

  • Michel Steuwer
  • Juan Fumero
  • Toomas Remmelg

This project aims at automatically accelerating applications running on top of the Graal VM, an Open source Java VM. To achieve this goal we first define a high-level API inspired by functional programming and data-flow programming concepts. At runtime, our system recognises the calls to our API and automatically generate OpenCL kernels. The runtime then manages the execution of this OpenCL kernel on multiple devices (e.g. GPU) which results in the application being transparently accelerated.

Design Space Exploration for Dynamically Reconfigurable Multicore

Project supported by Microsoft Research.

  • Paul Micolet

Dynamical reconfigurable multicore processors, such as the E2 architecture, offer the ability to merge simple cores into larger ones in order to increase performance. However, the problem of deciding how to aggregate these cores is non-trivial and is highly dependent on the application. In this project, we investigate the problem of mapping multi-threaded applications written in a data-flow language to this type of architecture.

Design Space Exploration for Heterogeneous Multicore

Project supported by ARM.

  • Erik Tomusk

Single-ISA heterogeneous processors have the potential to maximise performance in power-constrained mobile devices by running each job on the best available CPU core given a power budget. This research project focuses on developing new techniques to select the best set of cores in order to maximise runtime flexibility in terms of power and performance.

GPU Optimisation & Machine-Learning

Project supported by ARM.

  • Alberto Magni

Programming models such as OpenCL have been designed to achieve functional portability across multi-core devices from different vendors. However, the lack of a single cross-target optimizing compiler severely limits performance portability of OpenCL programs. Programmers need to manually tune applications for each specific device, preventing effective portability. In this project, we target a compiler transformations specific for data-parallel languages such as thread-coarsening. We address the problem of finding the best parameters that control these transformation in order to reach maximum performance. We propose a solution based on a machine-learning model that predicts the best optimisation parameters using static code features. The model automatically specializes to the different architectures considered.


Program committe member

  • International Symposium on Code Generation and Optimization (CGO), 2015,2017,2019
  • International Conference on Compiler Construction (CC), 2015,2019
  • IEEE Internal Parallel and Distributed Processing Symposium (IPDPS), 2018
  • International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2016,2017,2018
  • Symposium on Principles and Practice of Parallel Programming (PPoPP), 2016,2018
  • International Workshop on Adaptive Self-tuning Computing Systems (ADAPT), co-located with HiPEAC, 2013, 2014, 2015
  • International Workshop on Accelerating Data Management Systems Using Modern Processor and Storage Architectures (ADMS), co-located with VLDB, 2011, 2012, 2013, 2014, 2015, 2016, 2017
  • Workshop on Interaction between Compilers and Computer Architectures (INTERACT), co-located with HPCA, 2012, 2011, co-located with ASLOS, 2010
  • International Conference on Parallel and Distributed Systems (ICPADS), Multicore Computing and Parallel/Distributed Architecture track, 2011, 2013
  • Symposium on High Level Languages for Parallel Computing on FPGAs (HLFPGA), co-located with ParCo, 2015

Organising committee

  • Program chair, ACM SIGPLAN / SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2018
  • General chair, International Conference on Compiler Construction (CC), 2018
  • Program chair, High Performance Architectures and Compilers track, International European Conference on Parallel and Distributed Computing (EuroPar), 2017
  • Sponsor co-chair, International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2017
  • Finance chair, International Conference on Parallel Architectures and Compilation Techniques (PACT) 2016
  • Finance chair, International Symposium on Code Generation and Optimization (CGO) 2016
  • Workshop/Tutorial chair, International Symposium on Code Generation and Optimization (CGO) 2015
  • General co-chair, International Workshop on Adaptive Self-tuning Computing Systems (ADAPT), co-located with HiPEAC, 2013, 2014, 2015
  • Local chair, International Conference on Parallel Architectures and Compilation Techniques (PACT), 2013



email : christophe.dubach (AT) ed.ac.uk
phone : +44 (0) 131 650 3092

Christophe Dubach
University of Edinburgh
Informatics Forum - 1.12
10 Crichton Street
Edinburgh EH8 9AB
United Kingdom