Kees Goossens, Professor

Position

Since September 1995, Senior Principal Research Scientist at NXP Semiconductors (formerly Philips) Research.
Additionally, since February 2007, part-time Adjunct (Full) Professor (Buitengewoon Hoogleraar) at Computer Engineering group at the Delft University of Technology.

Research Topics

all aspects of networks on chip
- especially the Aethereal Network on Chip (NOC) developed since 2001 by Philips/NXP Research
- network on chip design flows
- hardwired networks on chip in FPGAs
- network on chip as test access mechanism (TAM)
- uses of networks on chip, e.g. for internet router crossbars
- communication protocols
memory controllers
reducing complexity
embedded multi-processor systems
- predictability, for real-time applications
- composability (cf. virtualisation), especially of temporal behaviour
- abstraction, especially transaction-based communication-centric debug
new challenges
- low power for real time applications
- variability in all its aspects
- 3D integration

See the Research and Publication pages for more details.

Much of this research has been performed as part of national and international research projects, including MESA, NEVA, TSAR, COMCAS, SCALOPES, 3DIM3.

All the research is collaboration with MSc and PhD students, postdocs (Andreas Hansson, Anca Molnos, Carlo Galuzzi, Lotfi Mhamdi, Jude Ambrose Angelo), and other researchers at NXP Semiconductors (Bart Vermeulen), Delft university of technology (Ben Juurlink), and other (Dutch) universities.

Previous Positions

My BSc in Computer Science and Pure Mathematics is from the Computer Science department of the University of Wales, UK (1984-1988).
My PhD in Computer Science is from the Laboratory for Foundations of Computer Science, of the University of Edinburgh, UK (1998-1993). My thesis treated Embedding Hardware Description Languages in Proof Systems, which involved operational semantics for a subset of the ELLA hardware description language, and embedded this semantics in the higher-order-logic proof system Lambda, and proving various properties about the embedded semantics, formal hardware synthesis, and symbolic simulation.
This was followed by post-doctoral positions at the Departamento de Informatica, Universidade Federal de Pernambuco, Brazil, and Dipartimento di Scienze dell'Informazione, Universita di Roma "La Sapienza", Italy (1993-1995).

Previous Research Topics

automated theorem proving for hardware verification. In particular, my PhD thesis describes the embedding of the formal semantics of a hardware description language (ELLA, VHDL, etc.) in the Lambda higher-order logic theorem prover.
high-level hardware synthesis design flow for high-throughput video processing, in particular the Philips Phideo architecture and design flow.
on-chip communication protocols for global (interchannel) resource management, and dynamic reconfiguration.

More information

In increasing information content, but surely out of date:

A respectable passport photograph for work purposes
50 word research biography
120 word research biography
short CV
longer CV