Current External Projects

European Integrated Project on Next Generation I/O for Exascale (NEXTGenIO)

European Integrated Project on Dynamical Exascale Entry Platform - Extended Research (DEEP-ER)



Previous Academic Projects

VESPA - Very Efficient Speculative Parallel Architecture




Cellular Multiprocessors



DETOURS - Dynamic Error Tolerance On Unreliable Substrates



Previous External Projects

European STREP on Embedded Reconfigurable Architecture (ERA)


European Integrated Project on Scalable Computer Architectures (SARC)