Paul Jackson's Home Page
I am a Senior Lecturer in the
School of Informatics
at the University of Edinburgh.

 email:
 Paul.Jackson (@) ed.ac.uk
 address:

Room 2.12
Informatics Forum
10 Crichton Street
Edinburgh EH8 9AB
United Kingdom
 phone:
 [+44] (0)131 650 5131
 fax:
 [+44] (0)131 651 1426

Research
Interests
My research interests concern the development of formal
verification tools and their application in such areas as hardware
verification, software verification, systems biology and formalised mathematics.
Specific current interests include:
 Formal verification of hybrid systems, in particular by use of deductive techniques such as realised in the KeYmaera theorem prover.
 Proof procedures for nonlinear arithmetic and their
application to hybrid systems verification. This and the
previous item were topics of
a recent EPSRCfunded
project.
 Using SMT solvers and interactive theorem provers to prove
software verification conditions. I have developed a tool, Victor, for augmenting the
capabilities of the tools available for formally analysing
programs written in the SPARK subset of
Ada.
In the past I have been interested in topics such as
 Space efficient and high performance encodings of linear
temporal logic bounded model checking problems into SAT
(propositional satisfiability) problems.
 Combining model checking and mechanical theorem proving techniques
in order to verify hardware. Generalising abstraction methods.
 Importing formal developments of mathematics in the Mizar mathematical language
into other theorem provers such as Isabelle.
 The design and use of interactive theorem provers. I undertook
extensive work on
Nuprl for my PhD and have experience with using
PVS.
Publications, Reports and Talks
(click to view)
Funding
Current:
Recent:
Tools
 Victor, a
verification condition translator for SPARK/Ada programs.
Postgraduate Students
Current PhD student:
 Kristjan Liiva. He is investigating using
compositional techniques to improve the scalability of the
validated integration of ODEs arising from biological
applications. He is cosupervised by
Grant Passmore at Aesthetic
Integration
and Christoph
Wintersteiger at Microsoft Research, Cambridge. He started in
September 2013.
Previous PhD students include
 Andrew Sogokon. His interests were in improving
the automation of formal proofs of correctness of hybrid systems.
He completed his PhD January 2016 and is currently a postdoc with
Taylor Johnson at the University of Texas Arlington.
 Grant
Olney Passmore. His PhD focussed on proof
procedures for nonlinear arithmetic over the rationals and reals.
He graduated in summer 2011. After a postdoc with me
on the EPSRCfunded
AutoPolyFun project, he cofounded
in 2014 the financial technology startup Aesthetic Integration.
 Daniel Sheridan. He looked at novel encodings of bounded model
checking problems into propositional satisfiability problems which
can be checked by SAT solvers. He graduated November 2006 and currently works for the formal methods
consultancy Adelard.
 Tom
Ridge. He verified a tree multicast protocol in the Isabelle
and HOLlight theorem provers, improved theorem prover automation, and
improved support for notions of proof context.
He graduated November 2006 and is currently a lecturer in the
Department of Computer Science at the
University of Leicester.
Professional Activities
 Program Committee for CADE 2013, the 24th International Conference on Automated Deduction.
 Coprogram chair for CAV 2010,
International conference on ComputerAided
Verification. July 2010
 Program Committee for VERIFY 2010, 6th International Verification Workshop.
 Program Committee for AFM 2010, 5th
Workshop on Automated Formal Methods
 Program Committee for WING 2009, Workshop on
Invariant Generation
 Trustee of international CALCULEMUS Interest Group for
integrating computer algebra systems and deduction systems. Dec
09  Nov 12.
Local Affiliations
Within the School of Informatics, I am a member of several research
institutes:
the Laboratory
for Foundations of Computer Science (LFCS), the Institute
for Computing Systems Architecture (ICSA), and
the Centre for
Intelligent Systems and their Applications.
Within CISA, I am most active
with the
Mathematical Reasoning Group
Teaching
Courses
In the 201516 academic year I am teaching
In the past courses I have taught include:
 Introduction
to Computer Systems, a 2nd year undergraduate course.
 Verification and Test I, an MSclevel course at the
Institute for
SystemLevel Integration (ISLI). Taught
foundations of verification methodology, using Verilog as the
course language.
 Verification and Test II, an MSclevel course at the
ISLI. Taught advanced verification methodology, using
SystemVerilog as the course language.
 The
CS/SE Individual Practical, a 3rd year
undergraduate course.
This course involved students developing a searchable
peertopeer database in Java.
 IP Block Integration, an
MSc module at the
ISLI.
This module explained how to assemble a systemlevel IC
design from predefined and precharacterised hardware IP
(Intellectual Property) blocks. It also covered current
techniques for hardware design verification and
designfortest approaches. The main practical work centered around
the e hardware verification language.
 Computer Science 1, a 1st year undergraduate course
in the School of Informatics.
This course was taken by all students on Informatics related
degrees. It covered topics such as programming in Java,
software engineering, and algorithms and datastructures.
Projects
Each year I supervise final year projects within Informatics and MSc
projects at the ISLI. Recent subjects of projects at Edinburgh
include:
 Using Boogie to verify SPARKAda programs
 Verifying SPARKAda programs using a SAT modulo theories
solver.
 Formalising zeroknowledge proofs in Isabelle.
 Evaluation of the ESC/Java static assertion checker for Java.
 Hardware verification using the Cadence SMV model checker.
 A parser for the Mizar Mathematical Library.
and at the ISLI:
 Verification of a memory controller using Verisity's Specman tool
and `e' language.
 Evaluation of Specman and the `e' language using a JTAG controller
case study.
 Overcoming the Challenges of Timing Convergence for Next
Generation SoC ASIC Devices
 Formal Verification of a RTL IP Block using Cadence FormalCheck.
 Analysis of Serial RapidIO performance and implementation of
part of the physical layer specification.
I have also proposed project on such topics as
 Building a MathWeb server for the Mizar Mathematical Library.
 A predicate subtyping extension for Isabelle/HOL.
 Bus protocol specification and verification using PSL
which have not yet attracted takers. If you are at Edinburgh or the
ISLI and looking for a project topic similar to any of the above,
please get in touch.
Administration
My current administrative duties are:
Biography
 Sep 11present:
 Senior Lecturer in Informatics at University of Edinburgh
 JanMar 03:
 Visiting Fellow with the
Computer Science Laboratory SRI International,
Menlo Pk, California.
 Apr 99Aug 11:
 Lecturer in Informatics at University of Edinburgh and in
System Level Integration at Institute for System level Integration
 98Mar 99
 Lecturer in Informatics at University of Edinburgh.
 9598
 Research Fellow in Computer Science at University of
Edinburgh.
 8895:
 MS, PhD degrees and postdoc in Computer Science at
Cornell University, Ithaca NY, USA. Most of this time I was
involved with the
Nuprl project.
 8688:
 MS in Physics at Cornell University.
Studied electron spin resonance in sapphire substrates using
superconducting microstrip resonators.
 8486:
 Designed applicationspecific ICs for US General Electric in
North Carolina, USA.
 8184:
 Undergraduate in Engineering at University of Cambridge, England. Electrical
Sciences Tripos in 3rd year.
Paul Jackson
Last modified: Thu 17 Mar 2016