photo_of_me
Christophe Dubach

University of Edinburgh
Informatics Forum - 1.02
10 Crichton Street
Edinburgh EH8 9AB
United Kingdom

PhD: The University of Edinburgh, 2009, under the supervision of Prof. Michael O'Boyle.
Royal Academy of Engineering / EPSRC Research Fellow (2009 - 2014)


Research Interests

  • Co-Design space exploration of microprocessor and compilers;
  • Adaptable architecture;
  • Multi-core design space exploration;
  • Machine learning techniques applied to compilers and microarchitecture design.

Refereed Conferences

  • Christophe Dubach, Timothy M. Jones, Edwin V. Bonilla, Grigori Fursin, and Michael F.P. O'Boyle.
    Portable Compiler Optimization Across Embedded Programs and Microarchitectures using Machine Learning.
    42nd IEEE/ACM International Symposium on Microarchitecture (MICRO), December 2009. [TO APPEAR]
  • Christophe Dubach, Timothy M. Jones, and Michael F.P. O'Boyle.
    Rapid Early-Stage Microarchitecture Design Using Predictive Models.
    IEEE International Conference on Computer Design (ICCD), October 2009. [PDF][BibTex]
  • Christophe Dubach, Timothy M. Jones, and Michael F.P. O'Boyle.
    Exploring and Predicting the Architecture/Optimising Compiler Co-Design Space.
    International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2008.  [PDF][BibTex]
  • Christophe Dubach, Timothy M. Jones, and Michael F.P. O'Boyle.
    Microarchitectural Design Space Exploration Using An Architecture-Centric Approach.
    40th International Symposium on Microarchitecture  (MICRO), December 2007.  [PDF][BibTex]
  • Christophe Dubach, John Cavazos, Björn Franke, Grigori Fursin, Michael F.P. O'Boyle, and Olivier Temam.
    Fast Compiler Optimisation Evaluation Using Code-Feature Based Performance Prediction
    .
    International Conference on Computing Frontiers (CF), May 2007.  [PDF][BibTex]
  • John Cavazos, Christophe Dubach, Felix Agakov, Edwin Bonilla, Michael F.P. O'Boyle, Grigori Fursin, and Olivier Temam.
    Automatic Performance Model Construction for the Fast Software Exploration of New Hardware Designs.
    International Conference on Compilers, Architecture, And Synthesis For Embedded Systems (CASES), October 2006.  [PDF][BibTex]
  • Miljan VuletiĆ, Christophe Dubach, Laura Pozzi, and Paolo Ienne.
    Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines.
    3rd IEEE/ACM/IFIP international Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), September 2005. [PDF][BibTex]

Other documents

  • Master thesis (supervisor: Prof. Paolo Ienne and Miljan Vuletic) at EPFL (École Polytechnique Fédérale de Lausanne), Switzerland
    Java Byte Code Synthesis for Reconfigurable Computing Platforms, January 2005 [PDF]