Zheng Wang

Institute for Computing Systems Architecture
School of Informatics
IF1.34 Informatics Forum
10 Crichton Street
Edinburgh
EH8 9AB


E-Mail: zh.wang #AT#@# ed.ac.uk

About me

I am a postdoctoral resarcher here in The University of Edinburgh in the School of Informatics. I am a member of the Compiler and Architecture Design Group at the Institute for Computing Systems Architecture.

My research interest is in using compiler/runtime approaches to imporve performance on multi-cores.

BIOGRAPHY

I accomplished my PhD on May, 2011 from the University of Edinbugh. My academic advisor is Michael O’Boyle.

Before coming to Edinburgh, I worked in IBM Research (China) from July 2005 to June 2007.
In IBM, I worked for the programming model and performance tools for multi-core systems. I am one of the main founders of Accelerated Library Framework (ALF) as well as the ALF code generator, for the Cell Broadband Engine processor.

I am a photographer and you can visit my online album at flickr. I enjoy jogging, Go, traditional Chinese paintings and EA FIFA games (from FIFA 96 to FIFA 09). Sometimes I cook at my spare time.

RECENT PUBLICATIONS

[HiPEAC'11] A Workload-Aware Mapping Approach For Data-Parallel Programs
Dominik Grewe, Zheng Wang and Michael O'Boyle,
In 6th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), January, 2011. [PDF][bib]

[PACT'10] Partitioning Streaming Parallelism for Multi-cores: A Machine Learning Based Approach (wins both Best Paper and Best Presentation Awards)
Zheng Wang and Michael O'Boyle,
In 19th Intl. Conference on Parallel Architectures and Compilation Techniques (PACT), September, 2010, 307-318. [PDF] [bib] [Slides]

[PLDI'09] Towards a Holistic Approach to Auto-Parallelization - Integrating Profile-Driven Parallelism Detection and Machine-Learning Based Mapping (HiPEAC Paper Award)
Georgios Tournavitis, Zheng Wang, Bjorn Franke and Michael O'Boyle,
In ACM SIGPLAN 2009 Conference on Programming Language Design and Implementation (PLDI), June 2009, 177-187. [PDF] [bib]

[PPoPP'09] Mapping Parallelism to Multi-cores: A Machine Learning Based Approach
Zheng Wang and Michael O'Boyle,
In 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), February 2009, 75-84. [PDF,PS][bib][Slides]


Posters:
    Partitioning Streaming Parallelism to Multi-cores. In HiPEAC Innovation Event, May 2010, Edinburgh
    Towards a Holistic Approach to Auto-Parallelization. In Scottish Informatics and Computer Science Alliance (SICSA) Event, 2009 Edinburgh
    Selecting Optimal Parallelism Configurations by Machine Learning. In Fourth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES'08), July 2008, L'Aquila Italy.

Patents:
    METHOD OF MANAGING DATA MOVEMENT AND CELL BROADBAND ENGINE PROCESSOR USING THE SAME SPE (US patent: US 2009/0049431 A1, China patent: CN200710141856.0.), Zheng Wang, Liang Chen, and Wenjun Want et al.
    METHOD AND COMPILER OF COMPILING A PROGRAM (US patent: US 2009/0089559 A1, China patent: CN200710153176.0.), Wenjun Wang, Zheng Wang, and Xin Zhong et al
    OVERLAY INSTRUCTION ACCESSING UNIT AND OVERLAY INSTRUCTION ACCESSING METHOD (US patent: US 2009/0089507 A1, China patent: CN200710153176.0.) Liang chen, Kuan feng, and Zheng Wang et al

Activities

Academic Activities:
    Programme Committee Member, The 4rd FTRA International Conference on Information Technology Convergence and Services (ITCS-12)
    Submission Chair, CGO'11
    Programme Committee Member, The 3rd FTRA International Conference on Information Technology Convergence and Services (ITCS-11)
    Reviewer, International Journal of Parallel, Emergent and Distributed Systems
    External Review Committee member, HiPEAC'2011
    Programme Committee Member, 15th International Conference on Parallel and Distributed Systems (ICPADS 2009)
Teaching Activities:
    Tutor, Operating Systems, Edinburgh University, 2010.
    Tutor, Operating Systems, Edinburgh University, 2009.
    Tutor, Informatics Research Review, Edinburgh University, 2008.

AWARDS

    Best Paper Award, In 19th Intl. Conference on Parallel Architectures and Compilation Techniques (PACT), Sept, 2010
    Best Presentation Award, In 19th Intl. Conference on Parallel Architectures and Compilation Techniques (PACT), Sept, 2010
    Overseas Research Student (ORS) Scheme Scholarship, Edinburgh 2007-2010
    Wolfson Microelectronic Scholarship, Edinburgh 2007-2010
    Bravo! Award, IBM 2007