Name
Vasileios Porpodas (Βασίλειος Πόρποδας in greek)
Contact Info
1.05 Informatics Forum
10 Crichton Street
Edinburgh, EH8 9AB
UK
Tel
0044 131 650 5146
I am a PhD student in the Institute for Computing Systems Architecture, School of Informatics, University of Edinburgh under the supervision of prof. Marcelo Cintra.
I am a member of the CArD - Compiler and Architecture Design Group.
My research is focused on compiler optimizations and multicore processor architectures.
Some important-looking CS graphs:
Coming up with an original idea is hard. The easiest thing to do is combine stuff. Randomly combining stuff can be quite helpful. So how about:
A. Milidonis, N. Alachiotis, V. Porpodas, H. Michail, G. Panagiotakopoulos, A.P. Kakarountas, and C.E. Goutis. Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy. Journal of Signal Processing Systems, pages 1–16, 2009. bib
A. Milidonis, V. Porpodas, N. Alachiotis, AP Kakarountas, H. Michail, G. Panagiotakopoulos, and CE Goutis. Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. Computers & Digital Techniques, IET, 3(1):109–123, 2009. bib
Software Simultaneous Multi-Threading. Poster @ IMEC PhD Days 2008, 2008.ppt and Report pdf
A. Milidonis, V. Porpodas, N. Alachiotis, AP Kakarountas, H. Michail, G. Panagiotakopoulos, and CE Goutis. A Scratch-Pad Memory Accelerator for Exploiting Run-Time Reuse. In VLSI-SOC 2008, 2008. bib
A. Milidonis, N. Alachiotis, V. Porpodas, H. Michail, AP Kakarountas, and CE Goutis. A Decoupled Architecture of Processors with Scratch-Pad Memory Hierarchy. In Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE’07, pages 1–6, 2007. bib
