Murali Krishna Emani · Home

Murali Krishna Emani



IF-3.38
School of Informatics
10 Crichton Street
Edinburgh EH8 9AB
Scotland, UK



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NEW: HiPEAC 2015 paper award for publication at PLDI'15

About me

I am a Research Associate at the School of Informatics, University of Edinburgh under the guidance of Prof. Michael O'Boyle . I'm a member of the Institute for Computing Systems Architecture (ICSA) and the Compiler and Architecture Design Group (CArD). Earlier, I finished a PhD at the same institute. Before moving to Edinburgh, I worked with Distributed Computing Lab of Infosys Labs, India. I have a Masters degree from IIIT Bangalore and a Bachelors degree from Osmania University, India.

Research Statement

My research lies in the broad area of mapping of parallel programs on multi-core machines. More specifically, I'm working on approaches to dynamically adapt parallel programs on multi cores in dynamic execution environments. I would like to create sophisticated ways to optimize any parallel program on-the-fly for peak performance.

I'm interested briefly in:
  • Designing and building self-adaptive, self-optimizing systems in dynamic environments
  • Adaptive and autonomic parallel computing through online learning
  • Parallelism detection in legacy applications
  • Porting sequential applications to Multicores and GPUs
  • Research commercialization

Research Interests

Parallel Programming, High Performance Computing, Runtime Systems, Machine Learning, Online Adaptation

Publications

Theses

  • PhD : Adaptive Parallelism Mapping in Dynamic Environments using Machine Learning [pdf]
    University of Edinburgh, UK, 2015

  • Masters : Scalability of J2EE Applications on Multi-core Machines
    IIIT Bangalore, India, 2008

Professional Activities

  • Program Committee: Eurosys '15 (shadow PC)
  • Technical Reviewer: PACT '15, Elsevier PARCO'15, ACM TECS '15, IISWC '15, CC'13, HiPC '10

Patents

  • (Granted) US Patent Publication number:US8869125 B2
    Systems and Methods for Demarcating Information Related to one or more Blocks in an Application
    Murali Krishna Emani, S Mallick and B Prasad

  • (Granted) US Patent Publication number: 9,043,775
    Method for Identifying Problematics Loops in an Application and Devices thereof
    Murali Krishna Emani, S Mallick and Balkrishna Prasad

  • US Patent Application: 13/024,111
    Method and System for Performing Event-Matching with a Graphical Processing Unit
    Sudeep Mallick and Murali Krishna Emani

Posters

  • "Celebrating Diversity: A Mixture of Experts pproach for Runtime Mapping in Dynamic Environments”
    In ACM SIGPLAN conference on Programming Language Design and Implementation (PLDI) 2015.
  • "Towards Enabling Self-Adaptivity to Parallel Programs in Dynamic Environments”
    In ACM SIGPLAN conference on Programming Language Design and Implementation Student Research Competition (PLDI) 2014.
  • "Workload-Aware Self-Adaptive Parallel Mapping”
    8th EuroSys Doctoral Workshop, Eurosys’14.
  • "Smart, Adaptive Parallel Mapping in presence of External Workloads”
    University of Edinburgh, ARM visit day, 2012
  • "A Predictive Modelling based Approach to Runtime Adaptation of Parallel Programs”
    Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES) 2011

Talks

  • Celebrating Diversity: A Mixture of Experts Approach for Runtime Mapping in Dynamic Environments, ACM SIGPLAN conference on Programming Language Design and Implementation (PLDI), Portland, OR, 2015

  • Change Detection based Parallelism Mapping: Exploiting Offline Models and Online Adaptation, The 27th International Workshop on Languages and Compilers for Parallel Computing (LCPC), Hillsboro, OR, 2014

  • Optimising Parallel Programs under Uncertainty, IBM TJ Watson Research Center, US, 2014

  • Smart, Adaptive Mapping of Parallelism in the Presence of External Workload, 8th Eurosys Doctoral Workshop, EuroSys'14, Amsterdam

  • A Novel Technique to Improve Parallel Program Performance Co-executing with Dynamic Workloads, IEEE International Conference on High Performance Computing [HiPC], Bengaluru, India, 2013

  • Workload-Aware Self-Adaptive Parallel Mapping, Google Munich, 2013

  • Smart, Adaptive Mapping of Parallelism in the Presence of External Workload, International Symposium on Code Generation and Optimization [CGO], Shenzhen, China 2013

  • A Predictive Modelling based Approach to Runtime Adaptation of Parallel Programs, Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems [ACACES], Fiuggi, Italy, 2011

  • Scalability of J2EE applications on Multi-core machines, IBM Research Labs India, 2010

Misc