Arpit Joshi

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Arpit Joshi

About Me

I am a Research Associate (Post-Doc) in the School of Informatics at the University of Edinburgh. I am broadly interested in the field of Computer Architecture and Systems. My recent research is focussed around providing architectural support for systems with persistent (non-volatile) memory. During PhD, I was supervised by Dr. Vijay Nagarajan and co-supervised by Prof. Stratis Viglas. I also work closely with Prof. Marcelo Cintra.

Previously, I was a Design Engineer at Intel, where I worked on the design and development of the Xeon family processors. I also have a masters degree from IIT Madras, where I investigated designs for low power on-chip interconnection networks under the supervision of Prof. Madhu Mutyam.

Publications (Google Scholar)

DHTM: Durable Hardware Transactional Memory (pdf)
Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas
The 45th International Symposium on Computer Architecture, Los Angeles, 2018 [ISCA]

Scale-Out ccNUMA: Exploiting Skew with Strongly Consistent Caching (pdf)
Vasilis Gavrielatos, Antonios Katsarakis, Arpit Joshi, Nicolai Oswald, Boris Grot, Vijay Nagarajan
European Conference on Computer Systems, Porto, 2018 [EuroSys]

Architectural Support for Atomic Durability in Non-Volatile Memory (pdf) [Nominated for Memorable Paper Award]
Arpit Joshi, Vijay Nagarajan, Stratis Viglas, Marcelo Cintra
The 9th Annual Non-Volatile Memories Workshop, San Diego, 2018 [NVMW]

ATOM: Atomic Durability in Non-volatile Memory through Hardware Support for Logging (pdf)
Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas
The 23rd International Symposium on High Performance Computer Architecture, Austin, 2017 [HPCA]

DCA: a DRAM-cache-aware DRAM controller (pdf)
Cheng-Chieh Huang, Vijay Nagarajan, Arpit Joshi
The International Conference for High Performance Computing, Networking, Storage and Analysis, Salt Lake City, 2016 [SC]

Efficient Persist Barriers for Multicores (pdf)
Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas
The 48th International Symposium on Microarchitecture, Waikiki, 2015 [MICRO]

DAPPER: a database-inspired approach to persistent memory (pdf)
Marcelo Cintra, Andreas Chatzistergiou, Arpit Joshi, Vijay Nagarajan, Stratis Viglas
The 6th Annual Non-Volatile Memories Workshop, San Diego, 2015 [NVMW]

Prevention flow-control for low latency torus networks-on-chip (pdf)
Arpit Joshi, Madhu Mutyam
The 5th International Symposium on Networks-on-Chip, Pittsburgh, 2011 [NOCS]

Timing variation-aware scheduling and resource binding in high-level synthesis (pdf)
Kartikey Mittal, Arpit Joshi, Madhu Mutyam
ACM Transactions on Design Automation of Electronic Systems, 2011 [TODAES]


Address: 10, Crichton Street
United Kingdom
Email: arpit.joshi at