Arpit Joshi

Publications | Contact

Arpit Joshi

About Me

I am a 3rd year PhD student in the School of Informatics at the University of Edinburgh. My research is focussed around providing architectural support for systems with persistent (non-volatile) memory. I am supervised by Dr. Vijay Nagarajan and co-supervised by Prof. Stratis Viglas. I also work closely with Prof. Marcelo Cintra.

Previously, I was an engineer at Intel Bangalore, where I worked on the design and development of a family of Xeon processors. I also have a masters degree from IIT Madras, where I investigated designs for low power on-chip interconnection networks under the supervision of Prof. Madhu Mutyam.

Publications (Google Scholar)

ATOM: Atomic Durability in Non-volatile Memory through Hardware Support for Logging
Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas
The 23rd IEEE Symposium on High Performance Computer Architecture, Austin, 2017 [HPCA]

DCA: a DRAM-cache-aware DRAM controller (pdf)
Cheng-Chieh Huang, Vijay Nagarajan, Arpit Joshi
The IEEE/ACM International Conference for High Performance Computing, Networking, Storage and Analysis, Salt Lake City, 2016 [SC]

Efficient Persist Barriers for Multicores (pdf)
Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, Stratis Viglas
The 48th Annual IEEE/ACM International Symposium on Microarchitecture, Waikiki, 2015 [MICRO]

DAPPER: a database-inspired approach to persistent memory (pdf)
Marcelo Cintra, Andreas Chatzistergiou, Arpit Joshi, Vijay Nagarajan, Stratis Viglas
Non-Volatile Memories Workshop, San Diego, 2015 [NVMW]

Prevention flow-control for low latency torus networks-on-chip (pdf)
Arpit Joshi, Madhu Mutyam
The 5th International Symposium on Networks-on-Chip, Pittsburgh, 2011 [NOCS]

Timing variation-aware scheduling and resource binding in high-level synthesis (pdf)
Kartikey Mittal, Arpit Joshi, Madhu Mutyam
ACM Transactions on Design Automation of Electronic Systems, 2011 [TODAES]


Address: 10, Crichton Street
United Kingdom
Email: arpit.joshi at