About me


I am a fourth year PhD student at the University of Edinburgh. I am advised by Prof. Nigel Topham and co-advised by Dr. Vijay Nagarajan. I am a member of the Compiler and Architecture Design Group (CArD) within the Institute of Computing Systems Architecture (ICSA) at the School of Informatics.

Presently, I am working at NVIDIA (July-October 2017) as a GPU Architect Intern in Santa Clara, California. In the past, I have worked as an R&D Engineer at Synopsys Inc. (2012-14) in the ARC Processor IP group. I completed my undergraduate studies from IIIT Hyderabad (2008-12) majoring in Electronics and Communication Engineering (Honours) and was advised by Dr. Shubhajit Roy Chowdhury for my dissertation. During the summer of 2011, I also worked as a research intern at the University of Cambridge with Dr. Neil Collings in the Centre for Advanced Photonics and Electronics (CAPE).
(Please refer to my CV for more details on the above projects and my role therein.)


Research Interests


My research interests span across GPU Architectures and Memory Hierarchy design. My current research efforts are directed towards exploring and addressing the inefficiencies in the GPU memory hierarchy for compute applications. These inefficiencies include Bandwidth Bottlenecks (on-chip and off-chip), Shared Bandwidth Management (or a lack thereof) and Cache Thrashing.


Publications


  • Evaluating and Mitigating Bandwidth Bottlenecks Across the Memory Hierarchy in GPUs

    Saumay Dublish, Vijay Nagarajan and Nigel Topham

    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)

    Santa Rosa, California, USA, April 23-25, 2017


    [PAPER]   [SLIDES: pptx | pdf ]  

  • Cooperative Caching for GPUs

    Saumay Dublish, Vijay Nagarajan and Nigel Topham

    ACM Transactions on Architecture and Code Optimization (TACO), Volume 13, Issue 4, Article 39, December 2016

    (Invited for presentation at HiPEAC 2017, Stockholm, Sweden, January 2017)


    [PAPER]   [SLIDES: pptx | pdf ]   [BIBTEX]  

  • Characterizing Memory Bottlenecks in GPGPU Workloads

    Saumay Dublish, Vijay Nagarajan and Nigel Topham

    IEEE International Symposium on Workload Characterization (IISWC)

    Providence, Rhoda Island, USA, September 25-27, 2016


    [PAPER]   [POSTER]   [BIBTEX]  

  • Slack-Aware Shared Bandwidth Management in GPUs

    Saumay Dublish

    ACM SRC, The 25th International Conference on Parallel Architectures and Compilation Techniques (PACT)

    Haifa, Israel, September 11-15, 2016


    [PAPER]   [POSTER]   [BIBTEX]  


Awards

  • ISPASS 2017 Student Travel Grant, San Francisco, USA2017
    IEEE

  • PACT 2016 Student Travel Grant, Haifa, Israel2016
    ACM SIGARCH

  • School of Informatics Doctoral Scholarship 2014-2017
    University of Edinburgh

  • Saranu International Research Scholarship 2015

  • Cambridge-India Partnership grant 2011
    University of Cambridge

  • CanSat Satellite Design/Launch Competition: Rank-1 (Global) 2010
    NASA (Goddard Space Flight Center and Jet Propulsion Lab)

    News: [1]   [2]   [3]   [4]  

  • World Embedded Software Contest: Rank-4 (Global) 2010
    Ministry of Knowledge Economy (MKE), Korea and The Federation of Korean Information Industries (FKII)

    News: [1]  



Education

  • PhD 2014-present
    University of Edinburgh

  • Bachelor of Technology (Hons.) 2008-2012
    International Institute of Information Technology Hyderabad (IIIT-H)



Work Experience

  • R&D Engineer 2012-2014
    Synopsys Inc.


  • Research Assistant 2011-2012
    EnhanceEdu
    IIIT-Hyderabad


  • Research Intern May-July, 2011
    Center for Advanced Photonics and Electronics (CAPE)
    University of Cambridge




Teaching

  • TA, Introduction to Computer Systems, University of Edinburgh Fall 2016

  • TA, Computer Design, University of Edinburgh Fall 2016

  • TA, Computer Architecture, University of Edinburgh Spring 2016

  • TA, Computer Design, University of Edinburgh Fall 2015

  • TA, Computer Design, University of Edinburgh Fall 2014

  • TA, Computer System Organization, IIIT-Hyderabad Spring 2012

  • TA, Embedded Systems-1, IIIT-Hyderabad Fall 2011

  • TA, Basic Electronic Circuit, IIIT-Hyderabad Spring 2011

  • TA, Digital Logic and Processors, IIIT-Hyderabad Fall 2010



Links