Figure 5. Atlas instruction format
Figure 5. Atlas instruction format
B-codes in Atlas were of the one-and-a-half-address type, however, since they involved operations on one of the 128 B-lines specified by the Ba field in the instruction, Bm being used to specify a single modifier. The B-store was implemented as a fast core store (0.7 microsecs cycle time) of 120 24-bit words, together with eight flip-flop registers which served special purposes. These included the floating-point accumulator exponent, for example, and the three control registers (or program counters) used for user programs, extracode and interrupt control. The existence of these three control registers allowed the machine to switch rapidly from one context to another, while their inclusion within the addressable B-store avoided the need for separate control transfer functions. Extracodes were a set of functions which gave access to some 250 built-in subroutines held in the high-speed (0.5 microsecs) read-only fixed store. These included the more complex mathematical functions such as sin, log, etc., peripheral control orders, input/output conversion routines, etc. The extracodes made use of 30 of the B-lines, leaving 90 for use as index registers or fixed-point accumulators in user programs.
User addresses in Atlas (defined by a 0 in their most significant address bit) referred to a 1M word virtual address space, and were translated into real addresses through a set of page registers (as will be described in chapter 3). The real store in the prototype machine consisted of a total of 112K words of core and drum storage, combined together through the paging mechanism so as to appear to the user as a one-level store. Thus a user's total working store requirements could not exceed this amount, but code and data could be placed in any convenient part of the virtual address space. This led to an informal segmentation of the address space, a concept developed formally in MULTICS. Formal segmentation, or 2-dimensional addressing, is used in MU5 and the ICL 2900 Series (see under The MU5 Instruction Format), and has appeared more recently in minicomputers such as the Data General ECLIPSE MV/8000 and microcomputers such as the Zilog Z8000 and Motorola M68010/M68020.
Atlas addresses with a 1 in the most significant bit were system addresses rather than user virtual addresses, and referred to the fixed store (containing the extracodes), the subsidiary store (used as working space by the extracodes and operating system), or the V-store. The latter contained the various registers needed to control the tape decks, input/output devices, paging mechanism, etc., thus avoiding the need for special functions for this purpose. This technique of incorporating peripherals into the address space was subsequently used in a number of computer systems, notably the DEC PDP-11, and is now in common use as `memory-mapped I/O'.