Reduced instruction sets
Some of the instruction sets we have examined contain quite complex
instructions, and we shall see in succeeding chapters that this can
lead to considerable hardware complication in their implementation.
Some designers [1] have questioned the
cost-effectiveness of this approach, arguing that in Reduced
Instruction Set Computer (RISC) architectures all (of a small number
of) instructions can be made to execute more quickly than any one
instruction in a Complex Instruction Set Computer (CISC), and that it
is in any case difficult for compilers to use CISCs effectively. To
some extent this argument makes a virtue out of a necessity for
designers of single chip computers, in which silicon area is at a
premium and finding space for the decoding logic or microprogram
control-store of a complex instruction set is difficult. The
complexity is instead transferred to the compiler used with a RISC
architecture, which often has to generate sequences of instructions
corresponding to constructs which could be handled directly in a CISC
architecture. Performance figures for RISCs are impressive, but it is
difficult to make objective comparisons between RISC and CISC
architectures, or even to find agreement on a definition of terms.
Colwell et al. [2] attempt to
disentangle the terminology, folk-lore and hype, and they present a
very useful comparison between RISC and CISC architecture.
Most RISC architectures derive from the CDC 6600, i.e. they
have a small set of registers which can be operated on by load/store
orders and 3-address register-register arithmetic instructions. Some
RISC architectures gain extra performance by having overlapping sets
of registers (ones which can be accessed with equal ease by a calling
and a called procedure, for example). As the number of registers is
limited, these registers are much more effective for some kinds of
program than they are for others. What is important for both the
compiler writer and the hardware designer is that the instruction set
be easy to compile into and easy to decode out of; this has more to do
with the instruction format having a regular structure than
with the complexity of the instructions themselves.
References
- ^
D.A. Patterson
"Reduced Instruction Set Computers"
CACM, Vol 28, No 1, 1985
- ^
R.P. Colwell, C. Hitchcock, E. Jens\
en, H. Brinkley-Sprunt, and C. Kollar
"Computers, Complexity and Controversy"
Computer, September, 1985
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