A Computing Surface Module fully populated with Quad Computing Elements can contain as many as 160 transputers, each of which has four bi-directional links. In order to be able to connect every possible set of links one would require a backplane routing resource with at least 1280 signals. This is beyond the limits of current packaging technology, and so a restricted routing resource is provided. The precise details of the capabilities and limitations of this restricted routing resource are not in the public domain, although the manufacturers claim not to have found a network of degree four which cannot be mapped on to the available routing resource.
The link network interface chips are full custom CMOS devices which essentially contain a cross-bar switch. They permit connections between the links on a board and the backplane routing resource to be set up under control of the Supervisor bus. Up to four of these 84-pin packages can be accommodated on each Quad Computing Element board. By allocating the user's virtual processors to the physical processors statically, it is possible to place them so as to maximise the connectivity of processors that are on the same board, thus minimising the backplane routing resource requirements.