Architecture of the T414

The T414 is a 32-bit microprocessor implementation of the general transputer structure. It has 2 Kbytes of on-chip RAM and four standard INMOS full duplex, serial links. The on-chip memory consists of 512 32-bit words of 50 ns cycle-time static RAM. The fixed-point processor is capable of executing code at a peak rate of one 8-bit transputer instruction every 100 ns, when isssuing instructions held in the on-chip RAM. The external 32-bit memory interface is capable of addressing up to 4 Gbytes and has a peak data transfer rate of 25 Mbytes per second, equivalent to one 32-bit word every three processor cycles. No external memory interfacing logic is required with the T414 since this is contained on-chip in the form of a programmable set of memory control signals. The T414 is thus able to provide refresh signals for a variety of dynamic memory devices, as well as signals suitable for use as row and column address strobes.

Each of the four links provides two occam channels, one in each direction, operating at frequency of 5, 10 or 20 Mbps†. The data transfer protocol is word length independent, enabling the T414 to interface to other devices in the transputer family which may have differing word lengths. The links operate autonomously, enabling the transmission and reception of messages to be overlapped with instruction processing. This is an important feature of the transputer, for it enables the performance-degrading effects of message-passing latency to be transparent to the processor. Of course this can only be achieved when there are sufficient parallel processes. The T414 also contains a timer which permits occam programs to perform real-time functions. For example, the current process can be delayed until the timer reaches a certain value.

The T414 contains approximately 150,000 transistors fabricated in a 1.5 micron twin-tub CMOS process, and dissipates less than 500 mW. It accepts a clock signal of 5 MHz, from which it generates its own internal processor clock.

† The standard link frequency is twice that of the input clock, i.e. 10 Mbps.