The Boolean Unit performs logic operations of the type
Xi = Xj OR Xk
Xi = Xj AND Xk
It operates on each pair of input digits in parallel and returns its result to the designated result register in 300 ns.
The Fixed Add Unit performs the operations
Xi = Xj + Xk
Xi = Xj - Xk
It treats the input operands as 1's complement numbers and uses a 60-bit parallel adder which allows it to return its result to the designated result register in 300 ns. It is also used as a partner to the Branch Unit when the latter is executing a conditional branch instruction which depends on a value in an X register.
The Shift Unit performs a variety of operations. The shifter itself is organised as a 6 logic level network capable of performing left circular and right arithmetic shifts to any position in 300 ns. It executes the operations Pack and Unpack, which respectively couple and separate the exponent and mantissa of a floating-point number using registers Xi, Bj, and Xk, and Mask, which forms a string of ones for use by the Boolean Unit in AND operations used for masking. The Shift Unit also executes the Normalise operation which takes 400 ns. In most computers the results of floating-point operations are automatically normalised, but this increases the time required for these operations. Normalisation is treated as an optional extra in the 6600, for which the user only pays the time penalty when the facility is used.
The Floating Add Unit also uses 1's complement representation for the 48-bit mantissae of floating-point numbers, but uses an 11-bit biassed binary exponent (an exponent value of 0 is represented as 10000000000). The mantissae are assumed, unusually, to be integers rather than fractions. This has the advantage of allowing fixed-point integers to be converted to floating-point numbers by simply ORing in the exponent bias. Thus the floating-point number format is as shown in the figure.
Floating-point addition and subtraction can be carried out in 400 ns and the result may be a rounded or unrounded single-length result, or the upper or lower half of a double-length result.
The 6600 boasts two identical Floating Multiply Units, each capable of producing a rounded or unrounded single-length or the upper or lower half of a double-length floating-point result in 1000 ns. This unit is a very interesting example of a high performance arithmetic unit, combining as it does the techniques of carry-save addition, multiplier pairs and split multiplier operation. However, we shall not be considering the details of arithmetic unit design in this book; the interested reader is referred to Thornton [1] for details of the 6600 arithmetic units, or to Gosling [2] for the design of arithmetic units generally.
Floating-point division is the longest arithmetic operation in the 6600, as it is in most computers, and requires 2900 ns to return a result to the designated result register.
Each of the two Increment Units performs fixed-point addition or subtraction on 18-bit numbers in 300 ns. These units are used for indexing and for the loading of A registers (thereby causing transfers of operands between the corresponding X registers and Central Storage) in operations such as
Ai = Aj + K
Ai = Aj - Bk
Bi = Aj + K
Bi = Aj - Bk
Either of these units may also be used as a partner to the Branch Unit when the latter is executing a conditional branch instruction which depends on a value in a B register.
The result register of the Branch Unit is the Program Address register, which is overwritten by an unconditional branch or a conditional branch for which the condition is met. Determination of the condition is carried out by a partner unit, an Increment Unit in the case of a B value being involved or the Fixed Add Unit in the case of an X value. The Branch Unit itself performs the jump within stack test (see under Instruction Buffers) to determine whether or not the target instruction of a branch is in the Instruction Stack. Branch instructions take 800 or 900 ns to complete if the target instruction is in the Instruction Stack, and 1400 or 1500 ns if not. They also hold up the issuing of further instructions until they have completed.