The BBN Butterfly

Our primary reason for examining this particular machine is that while many large-scale shared-memory architectures have been proposed, the Butterfly was the first machine of its size to become available commercially. As with all practical systems, the Butterfly achieved good performance within the range of sizes for which it was engineered but that venturing above this range with the same architecture will not necessarily produce the same results.

The origins of the Butterfly can be traced back to an earlier BBN Pluribus system [1], a multiple-bus parallel processor designed for high-reliability message processing on ARPANET. Subsequent research, into the design of a successor to Pluribus, began around 1975 with extensive support from the U.S. Defense Advanced Research Projects Agency (DARPA). Although the machine that emerged was originally intended to be used for a mixture of military and government applications, the commercial value of the Butterfly is now also being exploited. When the Butterfly was launched commercially in 1985 four machines out of an expected 10 had already been delivered to DARPA, and one of these machines was a 128-processor version.

Overview of the Butterfly

The Butterfly parallel processor [2, 3] is a tightly-coupled shared-memory machine with homogeneous processing elements. The machine's primary memory is distributed amongst the processors, with each processor having either 1 or 4 M~bytes of dynamic memory. The processor-memory pairs, known as processing nodes, are interconnected by the Butterfly Switch, details of which are presented later in this section. The block structure of the Butterfly architecture is illustrated in the figure.

Perhaps the most significant feature of the Butterfly is that it is purposefully engineered to be cost-effective over a wide range of configurations, up to a maximum of 256 processing nodes. The Input and Output are distributed amongst the processing nodes, with up to four I/O device adapters per node. These may be either IEEE~796 Multibus adapters or a proprietary adapter containing eight serial ports (4 x RS-232 and 4 x RS-449).

Each Butterfly card frame holds up to 16 processing nodes, and four card frames make up a rack. The largest configuration would therefore occupy eight racks. In order to maximise the system reliability for such large numbers of processing nodes each node has a private 'on-board' switched-mode power supply.