My research insterests include computer architecture, micro-architecture,
high-speed processor simulation, and the synthesis of new architectures.
I am currently the Principal Investigator on the PASTA project
3.5 year project funded by the EPSRC to research new methods of synthesising
architectures, micro-architectures and compilers. Full details are on the
PASTA project website
Before taking up a Chair in Computer Systems at Edinburgh University, I was
chief architect (and later a CTO) for ARC International. In that capacity I
was responsible for leading the project to develop the ARC 600, which
is now a widely deployed embedded processor.
Prior to ARC I worked on Clustered VLIW architectures, and took some
of those ideas to industry in via the startup company Siroyan (1999-2003).
In the early 90s I spent a number of years working on latency-tolerant
Decoupled Architectures, and spent a very enjoyable period working with
the Advanced Computer Research Institute (ACRI) in France (1989-1995).
Informatics, Appleton Tower, Crichton Street, Edinburgh, EH8 9LE, Scotland, UK
Tel: +44 131 650 2690, Fax: +44 131 651 1426, E-mail:
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