Computer Architecture Simulation & Visualisation

Some HASE Publications

• "dsimcluster: A Simulation Model for Efficient Memory Analysis Experiments of DSM Clusters", W. Marurngsith and R.N. Ibbett, SIMULATION, Vol. 85, No. 6, pp 355-374, 2009.
• "On the Scalability of Storage Sub-System Back-end Networks", Yan Li, Tim Courtney, Roland Ibbett and Nigel Topham, International Symposium on Performance Evaluation of Computer Telecommunications Systems, Edinburgh, June, 2008.
• "Work in Progress: Performance Evaluation of RAID6 Systems", Y. Li, T. Courtney, R. N. Ibbett and N. Topham, in WiP of FAST, San Jose, USA, 2007.
• "SIMRAID: An Efficient Performance Evaluation Tool for RAID Systems", Y. Li, T. Courtney, F Chevalier & R.N. Ibbett, Summer Computer Simulation Conference, Canada, August 2006.
• "Computer Architecture Simulation Models", R.N. Ibbett, J.C. Diaz y Carballo & D.A.W. Dolman, Proc ITiCSE06, p353, ACM, 2006.
• "Specification-Based Parameter-Model Interaction: Towards a Correct Reflection of Memory Characteristics in a DSM Cluster Simulation", W Marurngsith and R.N. Ibbett, Summer Computer Simulation Conference, USA, July 2005.
• "Overcoming the Driver Cost in Extreme Short Range Optical Interconnect", T. Courtney & F. Chevalier, accepted for presentation at IASTED Optical Communication Systems and Networks Conference (OCSN), Banff, Canada, July 2005,
• "Comparison of SBOD and MBOD Under SPC-1 Traffic", T. Courtney & F. Chevalier, IASTED PDCN 2005, Innsbruck, Austria, February 2005.
• "IOmeter Performance Comparison of SBOD and MBOD", F. Chevalier, R. Ibbett & T. Courtney, WSEAS Transactions on Computers, Issue 6, Vol. 3, Dec 2004.
• "A Methodology for Simulating Scientific Supercomputing Systems", Sadaf Alam & Roland N. Ibbett, Proc SCSC 2004, pp 149-154, 2004.
• "DSIMCluster: A Simulation Model for Efficient Memory Analysis Experiments of DSM Clusters", Worawan Marurngsith & Roland N. Ibbett, Proc SCSC 2004, pp 191-197 (winner of SCSC 2004 Best Paper Award), 2004.
• "Work in Progress: Low level simulation of back-end storage network using Hase", T. Courtney & F. Chevalier, IEEE Conference on Mass Storage systems and Technology, Maryland, USA, April 2004.
• "A Simulation Applet for Microcoding Exercises", R.N.Ibbett, Proc Workshop on Computer Architecture Education at ISCA, pp 122-129, 2004.
• "Computer Architecture Simulation Applets for Use in Teaching", R.N. Ibbett and F. Mallet, Proc Frontiers in Education 2003, Boulder, Colorado, Nov 2003.
• "Simulation of a Computer Architecture for Quantum Chromodynamics Calculations", Sadaf Alam, Roland Ibbett and Frederic Mallet, ACM Crossroads, Issue 9.3, pp 16-23, Spring 2003
• "An Extensible Clock Mechanism for Computer Architecture Simulations", F. Mallet, S. Alam & R.N. Ibbett, IASTED International Conference on Modelling and Simulation, USA, 2002.
• " HASE DLX Simulation Model", R.N.Ibbett, IEEE Micro, Vol 20, no 3, pp 57-65, 2000
• "Computer Architecture Visualisation Techniques", R.N.Ibbett, Microprocessors and Microsystems, Elsevier, Vol 23, pp 291-300, 1999.
• "A Hierarchical Computer Architecture Design and Simulation Environment" (ACM ToMaCS vol 8 no 4, 1998)
• "HASE: A Flexible Toolset for Computer Architects" (The Computer J., Vol 38, No 10, 1995)
• "DEMOS/SIMULA prototype version of HASE" (Proc. HICSS-27, 1994)
• MASCOTS'94 (Short paper describing a HASE demonstration) (postscript)
• "An interactive environment for the teaching of computer architecture", SIGCSE96 1996
• "Simulating the DASH Architecture in HASE" (29th Annual Simulation Symposium 1996)
• "Modelling and simulation of advanced computer systems: techniques, tools and tutorials", Chapter 1, F.W.Howell and R.N.Ibbett, edited by Kallol Bagchi, pp 1-18, Gordon and Breach 1996.

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